Seeing the necessity discussion about the Makefile, I suddenly remembered that I had done something interesting.
A directory with a lot of homogenous or heterogeneous programs, to test the efficiency of the system to handle concurrent tasks have to write a task loader (work load manager), written in C is still a bit large for the novice, using make -j can simulate a simple wlm. The code is probably as follows:
Binaries := $(foreach ccode, \
$(shell for cfile in `ls *.c`; do echo $cfile; done),\
$(ccode:.c=))
$(binaries): %:%.c
@echo BLD $@
@gcc -o $@ $" /dev/null 2"&1
To_run := $(foreach ccode, \
$(shell for cfile in `ls *.c`; do echo $cfile; done),\
To_run_$(ccode:.c=))
Run: clean $(to_run)
To_run_%: %
@to_run=$@; \
Echo ${to_run##to_run_};
Clean:
@echo -n "-------------------------------- CLEAN â€
@echo "--------------------------------"
@echo RMV $(binaries)
@rm -f $(binaries)
.PHONY: run clean
Run make -jN
In short:
1. default target is run, run depends on clean and to_run
Run: clean $(to_run)
2. to_run is generated by a shell
To_run := $(foreach ccode, \
$(shell for cfile in `ls *.c`; do echo $cfile; done),\
To_run_$(ccode:.c=))
3. Assume that there are 1.c 2.c 3.c 4.c under the directory. . 100.c This 100 c program, the to_run variable generated by the shell is equal to this string: to_run_1 to_run2 . . To_run_100
4. to_run_%: % That section of rule means that for a certain target to_run_73 depends on 73. When 73 does not exist or 73.c is updated, make will (re)create it according to the rules of binaries declared above:
$(binaries): %:%.c
@echo BLD $@
@gcc -o $@ $" /dev/null 2"&1
5. Run it after build 73. The example uses echo
@to_run=$@; \
Echo ${to_run##to_run_};
Can actually be
@to_run=$@; \
. /${to_run##to_run_};
This way 73 was run at the right time.
Assuming that make -j32 run is entered, the result is executable 1, 2, 3 . . .32 is run at the same time, one of which will automatically start later 33, 34 . . Until all the operations are finished, this simulates a simple local work load manager.
Another variant of the make script could be: You have a program (assumed to be called EXEC0). You want to run 32 EXEC0 instances with different parameters in parallel on a 16-core machine. Run a total of 1024 instances to test the system. Or the efficiency of EXEC0, Makefile can be written like this:
Ifeq ($(MAX),)
MAX=1024
Endif
Parameter0=0
Parameter1=11
Parameter2=22
Parameter3=33
Prerequisites := $(foreach num, \
$(shell i=0; while [ $$i -lt $(MAX) ]; \
Do \
Echo $$i; \
i=$$((i + 1)); \
Done), \
Target_$(num))
Run:$(prerequisites)
EXEC0: EXEC0.c
Gcc -o $@ $"
Target_%: EXEC0
@./EXEC0 $(parameter$(shell expr $(subst target_,,$@) % 4))
.PHONY: run
A boring EXEC0.c can be:
Int
Main(int argc, char **argv)
{
Sleep(atoi(argv[1]));
Printf("%s %d", argv[0], atoi(argv[1]));
Return 0;
}
Then make -j32 MAX=1024
/////////////////////////////////////////////////// /////////////////////////////////////////////////// /////
Test record:
Testcase := $(shell for test in `ls . ./tests/`; do echo $$test; done)
To_run := $(foreach test, \
$(shell for test in `ls . ./tests/`; do echo $$test; done), \
To_run_$(test))
Run : $(to_run)
To_run_%:
@to_run=$@; \
Run_test $${to_run##to_run_};
#$(shell grep -rn "Error" ./$${to_run##to_run_}/irun.log 》 error.log)
Clean:
@echo -n "-------------------------- CLEAN"
@echo "--------------------------"
@echo RMV $(testcase)
@rm -rf $(testcase)
.PHONY: run clean
3 Mm /8 Mm Nano Tip,Electronic Board Marker Pen,Touch Board Marker Pens,Infared Smart Board Marker
Shenzhen Ruidian Technology CO., Ltd , https://www.szwisonen.com